Showing posts with label Computer Architecture. Show all posts
Showing posts with label Computer Architecture. Show all posts

Monday, February 2, 2015

I'm Back! | Computer Architecture Reflection

Hi Friends,

I apologize for my absence these past few months. 

I was in the heat of college applications and as some of you may know, they can kind of consume you. 

I learned quite a bit in my Computer Architecture class, but I did not get a chance to document it all for you. The class was a semester course and we made a Hz processor with wires and chips. 

Apparently, my class was particularly unique. A few of my friends who are in college have told me that many college level courses are more theory based and do not emphasize hands-on learning. 

Our class had a few lectures on the theory behind what we were building, but I found that I learned quite a bit of it on my own through experimentation. I learned many valuable skills including, proper form for documentation, how to draw schematics, and shortcuts in the seemingly endless process of debugging. My professor required us to wire up everything we made - logic without execution was not accepted. 

Initially I found it tedious and frustrating when my breadboard would begin smoking or I had a short, but towards the end of the semester I learned how valuable knowing how to create what I designed truly was. 

I never want to go out into the world or work in a team without knowing how to execute my vision. That would be catastrophic.

My professor and my computer architecture class taught me to value every step of the learning process. I found myself enjoying every day, including test days. It was just very rewarding and was a truly healthy environment. 

In addition, there has been some discussion amongst my peers at school over the disproportionate number of females to males in advanced computer science courses. In fact there was an entire article about it in my school's publication, Wingspan. Many people have warned me that being a woman in a male dominated field is going to be hard and that I will be discouraged a majority of the time, but I am not someone who walks away from a challenge. I love computer science and I will do what I am passionate about. 

As a young woman, I am incredibly supportive of women entering engineering fields. But, I must say that my Computer Architecture class had an equal number of girls and boys. We were equally represented. Maybe this was an anomaly but in a class of 10 students, exactly 5 of us were girls. Even in the beginning of the term many people dropped the class, but none of them were girls. We were all friends and we worked together, helping each other debug problems and understand concepts. It was never a matter of gender, we looked at each other as peers and we were all there to learn.

I am glad to say that it is possible for both girls and boys to work together and support one another in an advanced course. I saw it myself. I hope that this will not be the last time I witness this and I hope that everyone remains supportive of each other and excited to learn. 

I really enjoyed my Computer Architecture class and I look forward to my Neural Networks class next semester. 

Unit next time,

Ashwini 

Saturday, September 20, 2014

Making other logic gates using only NAND Gates

This is pretty cool. So, since NAND chips (74LS00) are much cheeper to buy than the other logic gates, it is convenient to know how to make other gates with only NAND gates. As my teacher said in class "If I had to choose which chip to take with me onto a deserted island, I'd take the NAND chip" :)

NAND Gate

As mentioned in my previous post titled "Logic Gates" a NAND gate is a combination of a NOT gate and an AND gate (NOT + AND = NAND).

You can make any other logic gate with just NAND gates.

NOT Gate

A NOT gate is also known as an inverter gate. It inverts the values sent in. Since a NAND gate is a NOT gate and an AND Gate, by making A = B, we create a NOT gate.

AND Gate

To create an AND Gate using only NAND Gates, we must combine a NAND Gate and a NOT Gate made with NAND Gates (above). This way we can cancel out the NOT part of the NAND gate. 

OR Gate

An or gate returns 1 if any of the inputs is 1, a NAND gate will return 1 if one or more of the inputs is 0. To convert a NAND gate to an OR gate, we must invert the inputs. 


Its kind of magical! Click here for more gates, information and to see where I got the images above!




Tuesday, September 9, 2014

Gain

Gain is defined as the ability of a circuit to amplify the power or amplitude of a signal from the input to the output. It is usually calculated by finding the ratio between the output and the input. Gain can refer to voltage, current, or power. But, if the question does not otherwise specify it is asking for voltage gain.

Monday, September 8, 2014

P-N Junction

What is a P-N junction and how does it work?

Well, a P-N Junction is the boundary between the two semiconductor metals known as the p type and the n type. The n-type is created by doping a silicon atom with small amounts of Antimony, and a p-type is made by doping another silicon atom with small amounts of Boron. When they make contact they behave differently than they do by themselves and create one semiconductor that has been doped differently on either side. In particular, the current will only flow through it in one direction (forward or reversed bias).  The lattice between the two metals (diffusion region) have holes in them that when filled with electrons cancel each other and vanish. This causes an area which is depleted of any moving charges called the "depletion zone" and this transfer of electrons occurs on both sides creating an equilibrium. When a free charge enters the depletion zone it does not see any other free charges, instead it sees positive charges on the n side and negative charges on the p side. The force that these charges place on the free charge cause it to return to its original spot and leave the depletion zone. As a result the junction acts like a barrier and regulates the current. In order for charges to move from one type to the other they need to use extra energy and "climb uphill". The extra energy required can be supplied by a voltage applied between the two ends of the junction diode. If voltage is applied the wrong way the free charges are pulled away from the junction, causing it to not work.


Helpful Links: 

http://www.st-andrews.ac.uk/~www_pa/Scots_Guide/info/comp/passive/diode/pn_junc/pn_junc.htm

http://www.electronics-tutorials.ws/diode/diode_2.html

DeMorgan's Theorem

This theorem is a very important logic theorem for digital electronics and states that any logical binary expression will not change if we change all the variables to their complements, change all the AND operations to OR operations (and vice versa), or take the complement of the whole expression.

http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/ietron/demorgan2.gif


More Info

Sunday, September 7, 2014

Static Discipline

There are two ways to present data and information: analog and digital. The analog system typically represents the data in the form of a continuous wave which is easily interrupted and polluted by external noise. The digital system shows the data in two distinct states: 1 and 0. This creates a square wave which is much more resistant to noise.

Since digital devices are made by a variety of different manufacturers a set of development criteria have been created to ensure that devices made by different manufacturers will be able to communicate smoothly and efficiently. This criteria is called "Static Discipline" and states that if inputs meet the valid input thresholds (VIL --> VIH) then it is guaranteed that the outputs will meet the valid output thresholds (VOL ---> VOH). The "noise margin" is defined as the absolute value of the difference between the forbidden region voltage threshold for the reciever and the prescribed output voltage for the logic value.

Click here for example problems

Thursday, September 4, 2014

Logic Gate Simulation Arduino Activity

I did a really fun simulation activity to help cement my understanding of Logic Gates:

AND Gates






OR Gates






NOT Gates







NAND Gates





Wednesday, September 3, 2014

Boolean Algebra

Hi all, we have been learning some Boolean Algebra in my Computer Architecture class and I thought I would share what I have learned so far. As always, if you have any questions or comments please share them below.

Boolean Algebra is the subset of Algebra formulated by English mathematician George Boole. In "normal Algebra" the variables are numbers and the main operations are addition, subtraction, multiplication and division. But, in Boolean Algebra the values of the variables are true and false (1 and 0) and the main operations are "and" (^), "or" (v) and "not". Now, why is this significant? How is Boolean Algebra useful and why couldn't we just use Algebra? Well, the laws of Boolean Algebra are mainly used to describe circuits whose state can either be true or false (1 or 0). Boolean Algebra differs from Algebra because the values of true and false are represented by binary digits (bits) that do not behave like normal integers (think about the NOT, AND, and OR gates in my previous post). Don't get confused, in Boolean Algebra the 1 and 0 do NOT behave like normal integers, they represent true and false.

Boolean Postulates:

  1. 0 . 0  = 0
  2. 0 + 0 = 0
  3. 1 . 1 = 1
  4. 1 + 1 = 1
  5. 1 . 0 = 0 . 1 = 0
  6. 0 . 1 = 1 . 0 = 1

Boolean Laws:

AND ( . )
OR ( + )

Every law has a part (a) and a part (b) this is called duality and is done by switching every AND for an OR and every 1 for a 0 (inverting it).

  1. Commutative Law
    • (a) A + B = B + A
    • (b) A . B = B . A
  2. Associate Law
    • (a) (A + B) + C = A + (B +C) 
    • (b) ( A . B ) . C = A + (B . C)
  3. Distributive Law
    • (a) A (B + C) = A . B + A. C 
    • (b) A + (B . C) = (A + B) . (A +C) 
  4. Identity Law
    • (a) A + A = A
    • (b) A . A = A
  5. Redundance Law
    • (a) A + A . B = A
    • (b) A . (A + B) = A

Monday, September 1, 2014

Logic Gates

I am currently taking a Computer Architecture course and my teacher explained Logic Gates in class. I did not really understand them so I came home and looked into them further. I found some links and took some notes that I think explain them quite well. Good Luck and comment if you have any questions!

AND Gate:


The AND gate has an output that is normally at logic level 0, but goes HIGH to logic level 1 when all inputs are at logic level 1.

"If both A and B are true, then Q is true"


Helpful Links:
http://www.electronics-tutorials.ws/logic/logic_2.html

OR Gate:

The output of an OR gate is true if one or more if the inputs are true, but if all are false it outputs false.



Helpful Links:
Check out a live simulation: http://logic.ly/lessons/or-gate/

NOT Gate: Digital Inverter


The NOT gate is a single input device that has a normal output level of 1 and goes LOW at logic level 0 when an input is of logic level 1. So, it inverts the input signal. 


"If A is not true, then Q is true"


Helpful Links:
http://www.electronics-tutorials.ws/logic/logic_4.html

NAND Gate:


The NAND gate is a combination of the AND gate and the NOT gate (NOT + AND = NAND). It only produces an output when any of its outputs are NOT present. So, this means that it will only return true when any of its inputs are false. 


"If either A or B is not true, then Q is true"
Helpful Links: 
http://www.electronics-tutorials.ws/boolean/bool_4.html
http://www.electronics-tutorials.ws/logic/logic_5.html

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